diff --git a/Makefile.inc1 b/Makefile.inc1 index 2099fa9..6225a6b 100644 --- a/Makefile.inc1 +++ b/Makefile.inc1 @@ -253,8 +253,9 @@ TMAKE= MAKEOBJDIRPREFIX=${OBJTREE} \ # cross-tools stage XMAKE= TOOLS_PREFIX=${WORLDTMP} ${BMAKE} \ - TARGET=${TARGET} TARGET_ARCH=${TARGET_ARCH} \ - -DWITHOUT_GDB + TARGET=${TARGET} TARGET_ARCH=${TARGET_ARCH} + +# -DWITHOUT_GDB # world stage WMAKEENV= ${CROSSENV} \ @@ -1389,7 +1390,8 @@ cross-tools: .MAKE usr.bin/xlint/lint1 usr.bin/xlint/lint2 usr.bin/xlint/xlint \ ${_btxld} \ ${_crunchide} \ - ${_kgzip} + ${_kgzip} \ + gnu/usr.bin/gdb ${_+_}@${ECHODIR} "===> ${_tool} (obj,depend,all,install)"; \ cd ${.CURDIR}/${_tool} && \ ${MAKE} DIRPRFX=${_tool}/ obj && \ diff --git a/sys/arm/arm/intr.c b/sys/arm/arm/intr.c index 062b10a..50b0a56 100644 --- a/sys/arm/arm/intr.c +++ b/sys/arm/arm/intr.c @@ -137,6 +137,7 @@ arm_handler_execute(struct trapframe *frame, int irqnb) event = intr_events[i]; if (intr_event_handle(event, frame) != 0) { /* XXX: Log stray IRQs */ + printf("stray %d\n", i); arm_mask_irq(i); } } diff --git a/sys/arm/arm/locore.S b/sys/arm/arm/locore.S index f17ab8e..79c625b 100644 --- a/sys/arm/arm/locore.S +++ b/sys/arm/arm/locore.S @@ -258,14 +258,18 @@ mmu_init_table: /* fill all table VA==PA */ /* map SDRAM VA==PA, WT cacheable */ #if !defined(SMP) - MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) + MMU_INIT(0, 0, 4096, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) +// MMU_INIT(PHYSADDR, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) /* map VA 0xc0000000..0xc3ffffff to PA */ - MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) + MMU_INIT(KERNBASE, PHYSADDR, 1024, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) +// MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW)) #else - MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) +// MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) + MMU_INIT(0, 0, 4096, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) /* map VA 0xc0000000..0xc3ffffff to PA */ - MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) - MMU_INIT(0x48000000, 0x48000000, 1, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) +// MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) + MMU_INIT(KERNBASE, PHYSADDR, 1024, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) +// MMU_INIT(0x48000000, 0x48000000, 1, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) #if defined(CPU_MV_PJ4B) /* map VA 0xf1000000..0xf1100000 to PA 0xd0000000 */ MMU_INIT(0xf1000000, 0xd0000000, 1, L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW)) @@ -376,7 +380,7 @@ Ltag: orr r0, r0, #PHYSADDR ldr r0, [r0] #if defined(SMP) - orr r0, r0, #0 /* Set TTB shared memory flag */ + orr r0, r0, #2 /* Set TTB shared memory flag */ #endif mcr p15, 0, r0, c2, c0, 0 /* Set TTB */ mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */ @@ -541,3 +545,5 @@ szsigcode: .long esigcode-sigcode END(sigcode) /* End of locore.S */ + + diff --git a/sys/arm/arm/machdep.c b/sys/arm/arm/machdep.c index ddedd9b..7787959 100644 --- a/sys/arm/arm/machdep.c +++ b/sys/arm/arm/machdep.c @@ -425,7 +425,11 @@ cpu_flush_dcache(void *ptr, size_t len) { cpu_dcache_wb_range((uintptr_t)ptr, len); +#ifdef ARM_L2_PIPT + cpu_l2cache_wb_range((uintptr_t)vtophys(ptr), len); +#else cpu_l2cache_wb_range((uintptr_t)ptr, len); +#endif } /* Get current clock frequency for the given cpu id. */ diff --git a/sys/arm/arm/pl310.c b/sys/arm/arm/pl310.c index 758b5e5..9cbd2b2 100644 --- a/sys/arm/arm/pl310.c +++ b/sys/arm/arm/pl310.c @@ -341,8 +341,13 @@ pl310_attach(device_t dev) ctrl_value = pl310_read4(sc, PL310_CTRL); if (sc->sc_enabled && !(ctrl_value & CTRL_ENABLED)) { + /* invalidate current content */ + pl310_write4(pl310_softc, PL310_INV_WAY, 0xffff); + pl310_wait_background_op(PL310_INV_WAY, 0xffff); + /* Enable the L2 cache if disabled */ platform_pl310_write_ctrl(sc, CTRL_ENABLED); + device_printf(dev, "Cache enabled\n"); } if (!sc->sc_enabled && (ctrl_value & CTRL_ENABLED)) { diff --git a/sys/arm/conf/WANDBOARD b/sys/arm/conf/WANDBOARD new file mode 100644 index 0000000..4405d94 --- /dev/null +++ b/sys/arm/conf/WANDBOARD @@ -0,0 +1,189 @@ +# Kernel configuration for Efika MX Smarttop/Smartbook boards +# +# For more information on this file, please read the config(5) manual page, +# and/or the handbook section on Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ + +ident WANDBOARD + +include "../freescale/imx/std.wandboard" + +makeoptions WITHOUT_MODULES="ahc" + + +#options MD_ROOT # MD is a potential root device +#options MD_ROOT_SIZE=65536 # 8MB ram disk +#makeoptions MFS_IMAGE=/tmp/ARM-MD +#options ROOTDEVNAME=\"ufs:md0\" +#device md + +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options DEBUG +options VERBOSE_INIT_ARM +#options VERBOSE_SYSINIT + +options SCHED_4BSD # 4BSD scheduler +#options PREEMPTION # Enable kernel thread preemption +options INET # InterNETworking +#options INET6 # IPv6 communications protocols +#options SCTP # Stream Control Transmission Protocol +options FFS # Berkeley Fast Filesystem +options SOFTUPDATES # Enable FFS soft updates support +options UFS_ACL # Support for access control lists +options UFS_DIRHASH # Improve performance on big directories +options UFS_GJOURNAL # Enable gjournal-based UFS journaling +#options MD_ROOT # MD is a potential root device +options NFSCL # New Network Filesystem Client +#options NFSD # New Network Filesystem Server +options NFSLOCKD # Network Lock Manager +options NFS_ROOT # NFS usable as /, requires NFSCL +options MSDOSFS # MSDOS Filesystem +options CD9660 # ISO 9660 Filesystem +#options PROCFS # Process filesystem (requires PSEUDOFS) +options PSEUDOFS # Pseudo-filesystem framework +options TMPFS # TMP Memory Filesystem +options GEOM_PART_GPT # GUID Partition Tables. +options GEOM_LABEL # Provides labelization +#options COMPAT_FREEBSD5 # Compatible with FreeBSD5 +#options COMPAT_FREEBSD6 # Compatible with FreeBSD6 +#options COMPAT_FREEBSD7 # Compatible with FreeBSD7 +options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI +options KTRACE # ktrace(1) support +options SYSVSHM # SYSV-style shared memory +options SYSVMSG # SYSV-style message queues +options SYSVSEM # SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions +options INCLUDE_CONFIG_FILE # Include this file in kernel + +# required for netbooting +#options BOOTP +#options BOOTP_COMPAT +#options BOOTP_NFSROOT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=ue0 +# +#options ROOTDEVNAME=\"ufs:ada0s2a\" +options ROOTDEVNAME=\"ufs:da0\" + +#options SMP + +# kernel/memory size reduction +#options MUTEX_NOINLINE +#options NO_FFS_SNAPSHOT +#options NO_SWAPPING +#options NO_SYSCTL_DESCR +#options RWLOCK_NOINLINE + +# Debugging support. Always need this: +options KDB # Enable kernel debugger support. +# For minimum debugger support (stable branch) use: +#options KDB_TRACE # Print a stack trace for a panic. +# For full debugger support use this instead: +options DDB # Support DDB. +#options GDB # Support remote GDB. +options DEADLKRES # Enable the deadlock resolver +#options INVARIANTS # Enable calls of extra sanity checking +#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +options WITNESS # Enable checks to detect deadlocks and cycles +options DIAGNOSTIC + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +#device vlan # 802.1Q VLAN support +#device tun # Packet tunnel. +#device md # Memory "disks" +#device gif # IPv6 and IPv4 tunneling +#device faith # IPv6-to-IPv4 relaying (translation) +#device firmware # firmware assist module + +# Serial (COM) ports +device uart # Multi-uart driver +options BREAK_TO_DEBUGGER + +#device ata +#device atapci # Only for helper functions +#device imxata +#options ATA_STATIC_ID # Static device numbering + +device iomux # IO Multiplexor +#device pl310 + +device gpio +device gpioled + +device fsliic +device iic +device iicbus + +# SCSI peripherals +device scbus # SCSI bus (required for SCSI) +device da # Direct Access (disks) +device cd # CD +device pass # Passthrough device (direct SCSI access) + +# USB support +options USB_DEBUG # enable debug msgs +device ehci # OHCI USB interface +device usb # USB Bus (required) +device umass # Disks/Mass storage - Requires scbus and da +device uhid # "Human Interface Devices" +device u3g + +# USB Ethernet, requires miibus +device miibus +device aue # ADMtek USB Ethernet +device axe # ASIX Electronics USB Ethernet +device cdce # Generic USB over Ethernet +device cue # CATC USB Ethernet +device kue # Kawasaki LSI USB Ethernet +device rue # RealTek RTL8150 USB Ethernet +device udav # Davicom DM9601E USB + +# USB Wireless +#device rum # Ralink Technology RT2501USB wireless NICs + +# Watchdog timer. +# WARNING: can't be disabled!!! +device imxwdt # Watchdog + +# Wireless NIC cards +#device wlan # 802.11 support +#device wlan_wep # 802.11 WEP support +#device wlan_ccmp # 802.11 CCMP support +#device wlan_tkip # 802.11 TKIP support +#device wlan_amrr # AMRR transmit rate control algorithm + +# Flattened Device Tree +options FDT +options FDT_DTB_STATIC +makeoptions FDT_DTS_FILE=imx6dl-wandboard.dts + +# NOTE: serial console will be disabled if syscons enabled +# Uncomment following lines for framebuffer/syscons support +#device sc +#device kbdmux +#options SC_DFLT_FONT # compile font in +#makeoptions SC_DFLT_FONT=cp437 +#device ukbd # Allow keyboard like HIDs to control console + +#device ums diff --git a/sys/arm/conf/WANDBOARD_SMP b/sys/arm/conf/WANDBOARD_SMP new file mode 100644 index 0000000..8ed7639 --- /dev/null +++ b/sys/arm/conf/WANDBOARD_SMP @@ -0,0 +1,10 @@ + +include "WANDBOARD" + +ident WANDBOARD_SMP + +options SMP + + + + diff --git a/sys/arm/freescale/imx/common.c b/sys/arm/freescale/imx/common.c index d8fef82..8668ee0 100644 --- a/sys/arm/freescale/imx/common.c +++ b/sys/arm/freescale/imx/common.c @@ -73,3 +73,15 @@ fdt_pic_decode_t fdt_pic_table[] = { &fdt_intc_decode_ic, NULL }; + +#ifdef KDB +static void +imx_enter_debugger(void *dummy) +{ + + if (boothowto & RB_KDB) + kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); +} + +SYSINIT(imx_enter_debugger, SI_SUB_CPU, SI_ORDER_ANY, imx_enter_debugger, NULL); +#endif diff --git a/sys/arm/freescale/imx/imx6.files b/sys/arm/freescale/imx/imx6.files new file mode 100644 index 0000000..38a9883 --- /dev/null +++ b/sys/arm/freescale/imx/imx6.files @@ -0,0 +1,58 @@ +# $FreeBSD$ +arm/arm/bus_space_asm_generic.S standard +arm/arm/bus_space_generic.c standard +arm/arm/cpufunc_asm_armv5.S standard +arm/arm/cpufunc_asm_arm11.S standard +arm/arm/cpufunc_asm_armv7.S standard +arm/arm/irq_dispatch.S standard +kern/kern_clocksource.c standard + +# Init +arm/freescale/imx/imx6_machdep.c standard +arm/freescale/imx/common.c standard +arm/freescale/imx/bus_space.c standard + +# Dummy serial console +#arm/freescale/imx/console.c standard + +arm/arm/gic.c standard +arm/arm/mpcore_timer.c standard +arm/arm/pl310.c standard +arm/freescale/imx/imx6_l2cache.c standard + +arm/freescale/imx/imx6_mp.c optional smp + +# TrustZone Interrupt Controller +# arm/freescale/imx/tzic.c standard + +# IOMUX - external pins multiplexor +arm/freescale/imx/imx51_iomux.c optional iomux + +# GPIO +arm/freescale/imx/imx51_gpio.c optional gpio + +# Generic Periodic Timer +#arm/freescale/imx/imx_gpt.c standard + +# Clock Configuration Manager +arm/freescale/imx/imx51_ccm.c standard + +# i.MX5xx PATA controller +#dev/ata/chipsets/ata-fsl.c optional imxata + +# UART driver +dev/uart/uart_dev_imx.c optional uart + +# USB join controller (1 OTG, 3 EHCI) +dev/usb/controller/ehci_imx.c optional ehci + +# Watchdog +arm/freescale/imx/imx_wdog.c optional imxwdt + +# i2c +arm/freescale/imx/i2c.c optional fsliic +dev/ofw/ofw_iicbus.c optional fsliic + +# IPU - Image Processing Unit (frame buffer also) +#arm/freescale/imx/imx51_ipuv3.c optional sc + diff --git a/sys/arm/freescale/imx/imx6_l2cache.c b/sys/arm/freescale/imx/imx6_l2cache.c new file mode 100644 index 0000000..88359c5 --- /dev/null +++ b/sys/arm/freescale/imx/imx6_l2cache.c @@ -0,0 +1,112 @@ +/*- + * Copyright (c) 2012 Olivier Houchard. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +void +platform_pl310_init(struct pl310_softc *sc) +{ + uint32_t aux, prefetch; + + aux = pl310_read4(sc, PL310_AUX_CTRL); + prefetch = pl310_read4(sc, PL310_PREFETCH_CTRL); + + if (bootverbose) { + device_printf(sc->sc_dev, "Early BRESP response: %s\n", + (aux & AUX_CTRL_EARLY_BRESP) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Instruction prefetch: %s\n", + (aux & AUX_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Data prefetch: %s\n", + (aux & AUX_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Non-secure interrupt control: %s\n", + (aux & AUX_CTRL_NS_INT_CTRL) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Non-secure lockdown: %s\n", + (aux & AUX_CTRL_NS_LOCKDOWN) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Share override: %s\n", + (aux & AUX_CTRL_SHARE_OVERRIDE) ? "enabled" : "disabled"); + + device_printf(sc->sc_dev, "Double linefil: %s\n", + (prefetch & PREFETCH_CTRL_DL) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Instruction prefetch: %s\n", + (prefetch & PREFETCH_CTRL_INSTR_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Data prefetch: %s\n", + (prefetch & PREFETCH_CTRL_DATA_PREFETCH) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Double linefill on WRAP request: %s\n", + (prefetch & PREFETCH_CTRL_DL_ON_WRAP) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Prefetch drop: %s\n", + (prefetch & PREFETCH_CTRL_PREFETCH_DROP) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Incr double Linefill: %s\n", + (prefetch & PREFETCH_CTRL_INCR_DL) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Not same ID on exclusive sequence: %s\n", + (prefetch & PREFETCH_CTRL_NOTSAMEID) ? "enabled" : "disabled"); + device_printf(sc->sc_dev, "Prefetch offset: %d\n", + (prefetch & PREFETCH_CTRL_OFFSET_MASK)); + } + + /* + * Disable instruction prefetch + */ + // prefetch &= ~PREFETCH_CTRL_INSTR_PREFETCH; + // aux &= ~AUX_CTRL_INSTR_PREFETCH; + + // prefetch &= ~PREFETCH_CTRL_DATA_PREFETCH; + // aux &= ~AUX_CTRL_DATA_PREFETCH; + + /* + * Make sure data prefetch is on + */ + //prefetch |= PREFETCH_CTRL_DATA_PREFETCH; + //aux |= AUX_CTRL_DATA_PREFETCH; + + /* + * TODO: add tunable for prefetch offset + * and experiment with performance + */ + + //ti_smc0(aux, 0, WRITE_AUXCTRL_REG); + //ti_smc0(prefetch, 0, WRITE_PREFETCH_CTRL_REG); +} + +void +platform_pl310_write_ctrl(struct pl310_softc *sc, uint32_t val) +{ + pl310_write4(sc, PL310_CTRL, val); +} + +void +platform_pl310_write_debug(struct pl310_softc *sc, uint32_t val) +{ + pl310_write4(sc, PL310_DEBUG_CTRL, val); +} diff --git a/sys/arm/freescale/imx/imx6_machdep.c b/sys/arm/freescale/imx/imx6_machdep.c new file mode 100644 index 0000000..f12966a --- /dev/null +++ b/sys/arm/freescale/imx/imx6_machdep.c @@ -0,0 +1,150 @@ +/*- + * Copyright (c) 1994-1998 Mark Brinicombe. + * Copyright (c) 1994 Brini. + * Copyright (c) 2012, 2013 The FreeBSD Foundation + * All rights reserved. + * + * + * This code is derived from software written for Brini by Mark Brinicombe + * Portions of this software were developed by Oleksandr Rybalko + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Brini. + * 4. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45 + */ + +#include "opt_platform.h" + +#include +__FBSDID("$FreeBSD$"); + +#define _ARM32_BUS_DMA_PRIVATE +#include +#include +#include +#include + +#include +#include + +#include +#include /* For trapframe_t, used in */ +#include +#include + +#include + +#define IMX6_DEV_VIRT_BASE 0xff000000 + +vm_offset_t +initarm_lastaddr(void) +{ + + boothowto |= RB_VERBOSE|RB_MULTIPLE|RB_KDB|RB_SINGLE; + bootverbose = 1; + + if (fdt_immr_addr(IMX6_DEV_VIRT_BASE) != 0) + while (1); + + /* Platform-specific initialisation */ + return (fdt_immr_va - ARM_NOCACHE_KVA_SIZE); +} + +/* + * Set initial values of GPIO output ports + */ +void +initarm_gpio_init(void) +{ + +} + +void +initarm_late_init(void) +{ + +} + +#define FDT_DEVMAP_MAX 3 +static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = { + { 0, 0, 0, 0, 0, }, + { 0, 0, 0, 0, 0, }, + { 0, 0, 0, 0, 0, } +}; + +/* + * Construct pmap_devmap[] with DT-derived config data. + */ +int +platform_devmap_init(void) +{ + + /* + * Map segment where UART1 and UART2 located. + */ + fdt_devmap[0].pd_va = IMX6_DEV_VIRT_BASE; + fdt_devmap[0].pd_pa = 0x02000000; + fdt_devmap[0].pd_size = 0x00100000; + fdt_devmap[0].pd_prot = VM_PROT_READ | VM_PROT_WRITE; + fdt_devmap[0].pd_cache = PTE_NOCACHE; + + fdt_devmap[1].pd_va = IMX6_DEV_VIRT_BASE + 0x00100000; + fdt_devmap[1].pd_pa = 0x00a00000; + fdt_devmap[1].pd_size = 0x00100000; + fdt_devmap[1].pd_prot = VM_PROT_READ | VM_PROT_WRITE; + fdt_devmap[1].pd_cache = PTE_NOCACHE; + + pmap_devmap_bootstrap_table = &fdt_devmap[0]; + return (0); +} + +struct arm32_dma_range * +bus_dma_get_range(void) +{ + + return (NULL); +} + +int +bus_dma_get_range_nb(void) +{ + + return (0); +} + +void +cpu_reset(void) +{ + bus_addr_t src_addr = (bus_addr_t) (IMX6_DEV_VIRT_BASE + 0xd8000); + printf("Reset ...\n"); + + *(volatile unsigned int *)(src_addr + 0x0) |= (1<<13); + + while (1); +} diff --git a/sys/arm/freescale/imx/imx6_mp.c b/sys/arm/freescale/imx/imx6_mp.c new file mode 100644 index 0000000..9fcf8d3 --- /dev/null +++ b/sys/arm/freescale/imx/imx6_mp.c @@ -0,0 +1,105 @@ +/*- + * Copyright (c) 2012 Olivier Houchard. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +void mpentry(void); + +void +platform_mp_init_secondary(void) +{ + gic_init_secondary(); +} + +void +platform_mp_setmaxid(void) +{ + + mp_maxid = 1; +} + +int +platform_mp_probe(void) +{ + + // mp_ncpus = (*(volatile unsigned int *)(scu_addr + 4) & 7) + 1; + // printf("mp_ncpus %d\n", mp_ncpus); + + mp_ncpus = 2; + + return (1); +} + +void +platform_mp_start_ap(void) +{ + bus_addr_t scu_addr; + bus_addr_t src_addr; + + if (bus_space_map(fdtbus_bs_tag, 0x00a00000, 0x1000, 0, &scu_addr) != 0) + panic("Couldn't map the SCU\n"); + if (bus_space_map(fdtbus_bs_tag, 0x020D8000, 0x1000, 0, &src_addr) != 0) + panic("Couldn't map the system reset controller (SRC)\n"); + + /* invalidate SCU cache tags */ + *(volatile unsigned int *)(scu_addr + 0x0c) = 0xff; + armv7_drain_writebuf(); + cpu_idcache_wbinv_all(); + + /* Enable the SCU */ + *(volatile unsigned int *)(scu_addr + 0x30) |= 1; + *(volatile unsigned int *)scu_addr |= 1; + cpu_idcache_wbinv_all(); + cpu_l2cache_wbinv_all(); + + *(volatile unsigned int *)(src_addr + 0x28) = pmap_kextract((vm_offset_t)mpentry); + *(volatile unsigned int *)(src_addr + 0x2c) = 0; + + armv7_drain_writebuf(); + + *(volatile unsigned int *)(src_addr + 0x0) |= ((1<<22)|(1<<14)); + + armv7_drain_writebuf(); + armv7_sev(); + + bus_space_unmap(fdtbus_bs_tag, scu_addr, 0x1000); + bus_space_unmap(fdtbus_bs_tag, src_addr, 0x1000); +} + +void +platform_ipi_send(cpuset_t cpus, u_int ipi) +{ + pic_ipi_send(cpus, ipi); +} diff --git a/sys/arm/freescale/imx/std.wandboard b/sys/arm/freescale/imx/std.wandboard new file mode 100644 index 0000000..3446ef6 --- /dev/null +++ b/sys/arm/freescale/imx/std.wandboard @@ -0,0 +1,18 @@ +# $FreeBSD$ +machine arm armv6 +cpu CPU_CORTEXA +makeoptions ARM_LITTLE_ENDIAN +options ARM_L2_PIPT + +#options NO_EVENTTIMERS +options LINUX_BOOT_ABI + +options KERNVIRTADDR=0xc0100000 +makeoptions KERNVIRTADDR=0xc0100000 +options KERNPHYSADDR=0x10100000 +makeoptions KERNPHYSADDR=0x10100000 +options PHYSADDR=0x10000000 +options STARTUP_PAGETABLE_ADDR=0x10000000 + +files "../freescale/imx/imx6.files" + diff --git a/sys/boot/fdt/dts/imx6dl-wandboard.dts b/sys/boot/fdt/dts/imx6dl-wandboard.dts new file mode 100644 index 0000000..a3f0338 --- /dev/null +++ b/sys/boot/fdt/dts/imx6dl-wandboard.dts @@ -0,0 +1,325 @@ + +/dts-v1/; + +/ { + + #address-cells = <0x1>; + #size-cells = <0x1>; + + model = "Wandboard i.MX6 Dual Lite Board"; + compatible = "wand,imx6dl-wandboard", "fsl,imx6dl"; + + interrupt-parent = < &GIC >; + + memory { + reg = <0x10000000 0x40000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + + compatible = "arm,cortex-a9"; + reg = <0x0>; + next-level-cache = <0xa>; + }; + cpu@1 { + + compatible = "arm,cortex-a9"; + reg = <0x1>; + next-level-cache = <0xa>; + }; + }; + + aliases { + soc = &SOC; + }; + + clocks { + ckil { + compatible = "fsl,imx-ckil", "fixed-clock"; + clock-frequency = <0x8000>; + }; + ckih1 { + compatible = "fsl,imx-ckih1", "fixed-clock"; + clock-frequency = <0x0>; + }; + osc { + compatible = "fsl,imx-osc", "fixed-clock"; + clock-frequency = <0x16e3600>; + }; + }; + + SOC: soc { + compatible = "simple-bus"; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&GIC>; + /* ranges = <0x00000000 0x00000000 0x03000000>; */ + ranges; + + GIC: interrupt-controller@00a01000 { + compatible = "arm,cortex-a9-gic", "arm,gic"; + interrupt-controller; + reg = <0xa01000 0x1000 0xa00100 0x100>; + }; + + mp_tmr@00a00200 { + compatible = "arm,mpcore-timers"; + clock-frequency = < 504000000 >; + #address-cells = <1>; + #size-cells = <0>; + reg = < 0x00a00200 0x100 >, /* Global Timer Registers */ + < 0x00a00600 0x100 >; /* Private Timer Registers */ + interrupts = < 27 29 >; + interrupt-parent = < &GIC >; + }; + + l2-cache@00a02000 { + compatible = "arm,pl310-cache", "arm,pl310"; + reg = <0xa02000 0x1000>; + interrupts = <124>; + cache-level = <0x2>; + interrupt-parent = < &GIC >; + /*status = "disabled";*/ + }; + + aips-bus@02000000 { + compatible = "fsl,aips-bus", "simple-bus"; + + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x2000000 0x100000>; + ranges; + + spba-bus@02000000 { + compatible = "fsl,spba-bus", "simple-bus"; + + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x2000000 0x40000>; + ranges; + + serial0: serial@02020000 { + compatible = "fsl,imx6q-uart", "fsl,imx21-uart", "fsl,imx-uart"; + reg = <0x2020000 0x4000>; + interrupts = <58>; + clock-frequency = <0x0>; + clocks = <0x1 0xa0 0x1 0xa1>; + clock-names = "ipg", "per"; + interrupt-parent = < &GIC >; + }; + + }; + vpu@02040000 { + reg = <0x2040000 0x3c000>; + interrupts = <0x0 0x3 0x4 0x0 0xc 0x4>; + }; + + aipstz@0207c000 { + reg = <0x207c000 0x4000>; + }; + + gpt@02098000 { + + compatible = "fsl,imx6q-gpt"; + reg = <0x2098000 0x4000>; + interrupts = <55>; + clocks = <0x1 0x77 0x1 0x78>; + clock-names = "ipg", "per"; + interrupt-parent = < &GIC >; + }; + + wdog@020bc000 { + compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; + reg = <0x20bc000 0x4000>; + interrupts = <0x50>; + clocks = <0x1 0x0>; + }; + + wdog@020c0000 { + compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; + reg = <0x20c0000 0x4000>; + interrupts = <0x51>; + clocks = <0x1 0x0>; + status = "disabled"; + }; + + ccm@020c4000 { + compatible = "fsl,imx6q-ccm"; + reg = <0x20c4000 0x4000>; + interrupts = <0x57 0x58>; + + }; + + usbphy@020c9000 { + compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; + reg = <0x20c9000 0x1000>; + interrupts = <0x2c>; + clocks = <0x1 0xb6>; + }; + + usbphy@020ca000 { + compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; + reg = <0x20ca000 0x1000>; + interrupts = <0x2d>; + clocks = <0x1 0xb7>; + }; + + gpc@020dc000 { + compatible = "fsl,imx6q-gpc"; + reg = <0x20dc000 0x4000>; + interrupts = <0x59 0x5a>; + }; + + iomuxc-gpr@020e0000 { + compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; + reg = <0x20e0000 0x38>; + }; + + sdma@020ec000 { + compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; + reg = <0x20ec000 0x4000>; + interrupts = <0x2>; + clocks = <0x1 0x9b 0x1 0x9b>; + clock-names = "ipg", "ahb"; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; + }; + }; + aips-bus@02100000 { + compatible = "fsl,aips-bus", "simple-bus"; + + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x2100000 0x100000>; + ranges; + + aipstz@0217c000 { + reg = <0x217c000 0x4000>; + }; + + usb@02184000 { + compatible = "fsl,usb-4core"; + reg = <0x2184000 0x4000>; + interrupts = <75 72 73 74>; + interrupt-parent = < &GIC >; + }; + + ethernet@02188000 { + compatible = "fsl,imx6q-fec"; + reg = <0x2188000 0x4000>; + interrupts = <0x76 0x77>; + clocks = <0x1 0x75 0x1 0x75 0x1 0xbe>; + clock-names = "ipg", "ahb", "ptp"; + status = "disabled"; + }; + + usdhc@02190000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x2190000 0x4000>; + interrupts = <0x16>; + clocks = <0x1 0xa3 0x1 0xa3 0x1 0xa3>; + clock-names = "ipg", "ahb", "per"; + bus-width = <0x4>; + status = "disabled"; + }; + + usdhc@02194000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x2194000 0x4000>; + interrupts = <0x17>; + clocks = <0x1 0xa4 0x1 0xa4 0x1 0xa4>; + clock-names = "ipg", "ahb", "per"; + bus-width = <0x4>; + status = "disabled"; + }; + + usdhc@02198000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x2198000 0x4000>; + interrupts = <0x18>; + clocks = <0x1 0xa5 0x1 0xa5 0x1 0xa5>; + clock-names = "ipg", "ahb", "per"; + bus-width = <0x4>; + status = "disabled"; + }; + + usdhc@0219c000 { + compatible = "fsl,imx6q-usdhc"; + reg = <0x219c000 0x4000>; + interrupts = <0x19>; + clocks = <0x1 0xa6 0x1 0xa6 0x1 0xa6>; + clock-names = "ipg", "ahb", "per"; + bus-width = <0x4>; + status = "disabled"; + }; + + tzasc@021d0000 { + reg = <0x21d0000 0x4000>; + interrupts = <0x6c>; + }; + + tzasc@021d4000 { + reg = <0x21d4000 0x4000>; + interrupts = <0x6d>; + }; + + serial@021e8000 { + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21e8000 0x4000>; + interrupts = <0x1b>; + clocks = <0x1 0xa0 0x1 0xa1>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + serial@021ec000 { + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21ec000 0x4000>; + interrupts = <0x1c>; + clocks = <0x1 0xa0 0x1 0xa1>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + serial@021f0000 { + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f0000 0x4000>; + interrupts = <0x1d>; + clocks = <0x1 0xa0 0x1 0xa1>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + serial@021f4000 { + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x21f4000 0x4000>; + interrupts = <0x1e>; + clocks = <0x1 0xa0 0x1 0xa1>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + }; + + ipu@02400000 { + compatible = "fsl,imx6q-ipu"; + reg = <0x2400000 0x400000>; + interrupts = <0x6 0x5>; + clocks = <0x1 0x82 0x1 0x83 0x1 0x84>; + clock-names = "bus", "di0", "di1"; + resets = <0x8 0x2>; + }; + }; + + chosen { + stdin = &serial0; + stdout = &serial0; + }; +}; diff --git a/sys/dev/uart/uart_dev_imx.c b/sys/dev/uart/uart_dev_imx.c index 1651a9f..99e8cd2 100644 --- a/sys/dev/uart/uart_dev_imx.c +++ b/sys/dev/uart/uart_dev_imx.c @@ -386,8 +386,15 @@ imx_uart_bus_receive(struct uart_softc *sc) out |= UART_STAT_PARERR; if (xc & FLD(URXD, OVRRUN)) out |= UART_STAT_OVERRUN; - if (xc & FLD(URXD, BRK)) + if (xc & FLD(URXD, BRK)) { out |= UART_STAT_BREAK; +#ifdef KDB + if (sc->sc_sysdev != NULL && + sc->sc_sysdev->type == UART_DEV_CONSOLE) { + kdb_break(); + } +#endif + } uart_rx_put(sc, out); } diff --git a/sys/dev/usb/controller/ehci.c b/sys/dev/usb/controller/ehci.c index 51b012b..8918f06 100644 --- a/sys/dev/usb/controller/ehci.c +++ b/sys/dev/usb/controller/ehci.c @@ -92,10 +92,10 @@ ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus)))) #ifdef USB_DEBUG -static int ehcidebug = 0; +/*static*/ int ehcidebug = 0; static int ehcinohighspeed = 0; static int ehciiaadbug = 0; -static int ehcilostintrbug = 0; +/*static*/ int ehcilostintrbug = 0; static SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci"); SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN, diff --git a/sys/dev/usb/controller/ehci_imx.c b/sys/dev/usb/controller/ehci_imx.c index e9f148c..e36fdf7 100644 --- a/sys/dev/usb/controller/ehci_imx.c +++ b/sys/dev/usb/controller/ehci_imx.c @@ -149,7 +149,8 @@ fsl_ehci_attach(device_t self) /* TODO: Power/clock enable */ /* TODO: basic init */ - for (i = 0; i < FSL_EHCI_COUNT; i ++) { + //for (i = 0; i < FSL_EHCI_COUNT; i ++) { + for (i = 1; i < 2; i ++) { /* No interrupt - no driver */ if (sc->sc_res[1 + i] == NULL) continue; @@ -206,6 +207,27 @@ fsl_ehci_attach(device_t self) err = ehci_init(esc); if (!err) { + if (i < 2) { + uint32_t reg; + + reg = EOREAD4(esc, EHCI_PORTSC(1)); + reg = (reg & ~(3<<30)) | (0 << 30); + EOWRITE4(esc, EHCI_PORTSC(1), reg); + + reg = EOREAD4(esc, EHCI_PORTSC(1)); + reg &= ~(EHCI_PS_CSC | EHCI_PS_PEC | EHCI_PS_OCC); + reg |= EHCI_PS_PP | EHCI_PS_PE; + EOWRITE4(esc, EHCI_PORTSC(1), reg); + + reg = EREAD4(esc, 0xa4); + reg |= (1<<30) | (1<<24) | (1 << 5); + EWRITE4(esc, 0xa4, reg); + + reg = EREAD4(esc, 0xa8); + reg &= ~(3<<0); + EWRITE4(esc, 0xa8, reg); + } + esc->sc_flags |= EHCI_SCFLG_DONEINIT; err = device_probe_and_attach(esc->sc_bus.bdev); } else {