Index of /baussh/JFEX/Schematics/11112015

	Name	Last modified	Size	Description
	Parent Directory		-
	AVAGO_MINIPOD_REC.SCH.1.pdf	2015-11-11 10:26	77K
	AVAGO_MINIPOD_TRAN.SCH.1.pdf	2015-11-11 10:26	53K
	CLOCK.SCH.1.pdf	2015-11-11 10:29	195K
	CLOCK_CML_FANOUT6_AC.SCH.1.pdf	2015-11-11 10:30	102K
	CLOCK_CML_FANOUT6_DC.SCH.1.pdf	2015-11-11 10:30	95K
	CLOCK_LVDS_FANOUT8.SCH.1.pdf	2015-11-11 10:31	45K
	CLOCK_LVPECL_SI591_AC.SCH.1.pdf	2015-11-11 10:30	40K
	CONFIG_PROCESSOR_U1.SCH.1.pdf	2015-11-11 10:27	64K
	CPLD.SCH.1.pdf	2015-11-11 10:27	80K
	IPBUS.SCH.1.pdf	2015-11-11 10:27	45K
	IPMC.SCH.1.pdf	2015-11-11 10:32	155K
	JFEX_PROTO_MAINBOARD_ALL.pdf	2015-11-11 10:33	1.8M
	JITTERCLEANER_SI5338.SCH.1.pdf	2015-11-11 10:31	44K
	JTAG.SCH.1.pdf	2015-11-11 10:32	72K
	MAX20751_1Phase.pdf	2015-11-30 10:06	84K
	MAX20751_2PHASE.pdf	2015-11-30 10:06	100K
	MAX20751_3PHASE.pdf	2015-11-30 10:05	111K
	MAX20751_4PHASE.pdf	2015-12-02 10:50	130K
	MUX_CML_4X2_DC.SCH.1.pdf	2015-11-11 10:30	131K
	POWER_SUPPLY.SCH.1.pdf	2015-11-11 10:32	82K
	PinMapping_Mezzanine.pdf	2015-11-30 11:20	28K
	QUAD_CLOCK_GEN.SCH.1.pdf	2015-11-11 10:30	55K
	U1_MGT_REAL_TIME.SCH.1.pdf	2015-11-11 10:25	213K
	U1_PARALLEL_IO.SCH.1.pdf	2015-11-11 10:24	128K