The main board adheres to a strict point-to-point connection scheme. The signal direction is generally defined by configuration, source termination is FPGA-internal, sink is high impedance. Most lines are 1.5V. The following connections exist:
Connectivity from the main board resident control circuitry to the processors is as follows:
SMB bus covering input temperature converter and main temperature converter and ROC daughter. The SMB bus itself might be routed to spare pins on the input daughters? SMB voltage sensor? Voltage sense lines and direct ADC/G-link connection should go to ROC daughter. Also the CAN Tx and Rx lines. This will allow to move the CAN to the ROC daughter if there were a bug in the main board CAN design.
Diff spares for data and precision clock. Precision clock would have to go on future ROC daughter.
Main processor 2.5V bank (JMM/SMM) via jumper and separate power supply. for future adaptation to CMM. If VirtexPRO, then separate low voltage I/O from core.
Any connectivity from ACE and CAN to ROC goes via spare-lines port of CPLD. make wide enough! not necessarily connected to anything on the ROC daughter. daughter can be re-designed if buggy.
clocks: Xclock on ACE CPLD locally. ck40 via spares port.
ACE CPLD needs to handle version /serial number of main board.
do not forget vers/SN handling on ROC daughter. needs to transmit input daughter versions to VME, too.
pull-down on VME data lines?
FPGA/flash rather than CPLD anywhere?
coolrunner updates possible on the fly?
for VME takeover from ACE CPLD or ROC CPLD to FPGA we need spare lines to guarantee via handshake that takeover is not disturbing current VME operation.
dont forget internal dtack pullup, if wire-or planned.
still attractive to have single-point board select... allow for lines.
do parallel addresses to input/main via CPLD on ROC. geoadd from ROC p2p to allow for different use of lines in future revision (low level signals)
route geoadd and other static or slow signals (VME?) as differential pairs for future use.
neighbouring GNDs fix now already on main board ? ground from daughters is required?