(For current design issues see below)

Status of PRR documents:

2005-12-13 added collection of reviewers comments.

Started linking in the talks. Be aware that they might be non-final until immediately before they are given.

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2005-12-12 Jemspecs new version: update table 1 (jet processor)

2005-12-09 JEMtests first draft posted

posted final JEMspecs version and jet processor register description

New version of JEMVME document posted to agenda page – 1.1a. Correct SystemACE mapping. See change log.

2005-12-07 Schematics (plus drawings JEM/daughters and front panel): available and final

Production / test plan : final

VME programming model : final (except jet processor which goes into a separate document)

Preliminary version of main specifications document available, modifications expected to jet related sections and power consumption

Costing and breakdown to module level were requested by the FDR reviewers. This information will not be posted to the agenda system. It will be presented at the PRR. If you wish any preliminary information in advance, please ask.

Design issues:

1) CAN SMB subsystem currently not stable due to mixed 3.3V/5V SMB system : incompatibility to 5V CMOS signal thresholds on Fujitsu CAN controller. Affects: control daughter only. To be resolved by adding level translators.

2) SystemACE issue resolved: JEM1.3 will have 16-bit access only, address lines will be swapped.

3) Front panel design / connector positions might be non-final. Cannot be checked unless TripleEase panels/handles become available. Not available from the manufacturer as samples. Have been ordered, not expected to be delivered in 2005. affects : main board. Can anyone help ?