аЯрЁБс>ўџ 35ўџџџ2џџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџьЅС#` №ПlbjbjЁЁ."УУlџџџџџџЄ.RRRRf . Ж~~~~~~~~‚„„„„„„$Й h! JЈ~~~~~Ј~~Н~^~~‚~‚~r @ќ'§фГЧRм ‚г0 k ц"k k d~~~~~~~ЈЈ~~~ ~~~~...$R...R...џџџџ Timing Calibration Scheme The JEP and CP systems employ several stages of similar, but not identical circuitry to align clock and data, such that data are captured when valid, and such that data of all channels are kept in the bunch tick to which they belong. To this end, alignment of both phase (fraction of a clock tick) and delay (full clock ticks) is required. This is generally done selecting one of several sampling phases (rising/falling edge or four-phase clock) individually for each channel and re-registering the data to a common clock phase before sending them into the algorithmic parts of the FPGA code. The re-registering of the data adds to latency, if the latest incoming data happen to be registered on a phase that is different from the common clock phase. The optimum sampling phase can be determined either with firmware counting parity errors for the individual phases or with a delay scan at one fixed phase. The firmware approach deals with single channels only. Channel-to-channel alignment needs to be done using software. The delay scan is a fully software driven scheme. It allows determining both the optimum sampling phase and the skew between channels in one go. JEM The JEM timing calibration scheme relies on delay scans determining the optimum sampling phases for each channel. The input processors latch the incoming LVDS parallel data at both the rising and the falling clock edge. The delay scan results are used to determine the one of the two samples that is expected to be error free. Since the full data eye is measured in the scan, and since the data eyes are nominally 25ns wide, the sampling point can always be placed sufficiently far from the edges. The delay scan scheme was introduced with JEM1.0, though software development is under way only now. It requires the PPr transmitting a linear ramp from its playback memories. On the JEMs Clock40Des1 is stepped in units of 1.04ns. After each step the playback/spy pointers are re-adjusted with help of a TTC short broadcast .The incoming LVDS data are then captured in the playback memories. It is sufficient to read out a single tick worth of data, for the rising clock edge and zero bunch ticks delay. Clock40Des1 is then set back to its nominal value and the timing calibration software calculates the optimum sampling phase for each of the channels. The latency correction is calculated so as to align the channels in terms of full bunch ticks. Phase and delay values are written to the database. FIO lines are timed-in in a similar way, though the sampling phase cannot be adjusted on a per-channel base. A delay scan is performed on Clock40Des1 with a step size of 104ps. The input processors transmit linear ramps synchronous to Clock40Des1 and the jet processor latches the data on Clock40Des2 and checks for pattern errors. The timing calibration software reads the error counters and optimizes both Clock40Des1 and Clock40Des2 so as to widen the data eye to a maximum. Wile the sum processor runs off Clock40Des1 only, the jet processor runs its real-time data path off Clock40Des2, so as to avoid an increase in latency due to re-registering the data. Therefore data arriving at the mergers suffer from an additional slot-to-slot skew on Clock40Des1 and Clock40Des2 introduced by the FIO phase adjustment mechanism. CPM CMM The CMM latches the incoming data on one of four programmable phases. There is no programmable full-tick delay available for latency correction. Therefore the optimum clock phase determined by an automatic tool might unfortunately move early data in a different bunch tick than late data, if the incoming data are widely spread around the 0 degree phase. This can be avoided only by adjustment of the TTCrx clock phase on the CMM. The JEP phases are not available for this global phase correction if the latency optimized timing scheme is employed (see below). Latency On the data path from JEMs/CPMs through the CMMs there are several stages of re-synchronisation of data. Data are in a first step latched on a clock phase that captures the data error free. The phase is chosen on a per-channel basis. In a second step all data is latched on a common clock before it is processed. Latency can be minimized if, by an adequate choice of the TTCrx deskew values, the latest incoming data are allowed to be latched on the global clock right away. This requires a full delay scan to determine the clock/data phases. 17dПмm j  C д  V Ќ  " . 8 о ц [ryЄІь+НОйкпы -ЎГЗМѕЧШ^ѕъѕтѕтктквтквквЪТЪКЪВЪКЪКЪЊЪЊЂЊš’š‡šЊšЊššš’Ъ’hЁщmH sH hЁщhЁщmH sH h‰xРmH sH h=V#mH sH h&n…mH sH hQdЎmH sH h2fФmH sH hL>лmH sH hј/KmH sH hЎmH sH hIJ“mH sH h4DmH sH he*сmH sH he*сhшSmH sH he*сhe*сmH sH 0 ­ Ў В ЅІШЩЇЈ  BCKLlњјјјјѓююююјјјјјјјщфщфјщјјgdHѕgdHѕgdЎgdЎgde*сlў^v„ŽЄПШІЇГЖƒ­ц@ABC ЁвгFklј№ш№р№јијајарШрШрШНјаЕаЕаЕаh‹b mH sH hHѕhHѕmH sH h0KomH sH hHѕmH sH hЎmH sH hд=mH sH hL>лmH sH h‰xРmH sH h;mH sH ,1hА‚. АЦA!А‰"А‰#‰$n%ААФАФ Ф†œD@ёџD StandardCJ_HaJmHsHtH^@^ e*с мberschrift 3$Є№Є<@&5CJOJQJ\^JaJJA@ђџЁJ Absatz-StandardschriftartXi@ѓџГX Normale Tabelleі4ж l4жaі 0k@єџС0 Keine Listel " џџџџ  ­ЎВЅІШ Щ Ї Ј       BCKLn(0€€˜0€€˜0€€˜0€€˜0€€(0€€˜0€€˜0€€˜0€€˜0€€˜0€€˜0€€˜0€€˜0€€˜0€€˜0€€˜0€€(0€€˜0€€(0€€˜0€€˜0€€(0€€˜0€€˜0€€^l ll]aЂЇ:@bkx|ПФХЫnn” Ч  n:@nх4D=V#Х",;д=ј/K0Ko&n…шSIJ“‹b ЎQdЎ‰xР2fФL>лe*сЁщHѕџ@€AAЌGDAAlА@џџUnknownџџџџџџџџџџџџG‡z €џTimes New Roman5€Symbol3& ‡z €џArial"qˆ№ФЉЃЖfбЊЖ† b  b  a#№‰‰ДДr4dd №HX(№џ?фџџџџџџџџџџџџџџџџџџџџџe*с2џџuschaefeuschaefeўџр…ŸђљOhЋ‘+'Гй0L€ˆ” ДРд шє  ,4<Dф uschaefe Normal.dot uschaefe12Microsoft Office Word@№Щџ#ГЧ@Ž2ьфГЧb ўџеЭеœ.“—+,љЎ0  hp ЈАИ РШаи р эф(Johannes Gutenberg-Universitфt Mainz dФ  Titel ўџџџўџџџ !ўџџџ#$%&'()ўџџџ+,-./01ўџџџ§џџџ4ўџџџўџџџўџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџRoot Entryџџџџџџџџ РF@m*§фГЧ6€Data џџџџџџџџџџџџ1TableџџџџWordDocumentџџџџ."SummaryInformation(џџџџџџџџџџџџ"DocumentSummaryInformation8џџџџџџџџ*CompObjџџџџџџџџџџџџqџџџџџџџџџџџџўџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџџўџ џџџџ РFMicrosoft Office Word-Dokument MSWordDocWord.Document.8є9Вq