steffen staerz mail contributors to ffex document (talk to Robin)

Stavros:
firefly locking to specific line rates !

vhdl based


can packets be any size / is there minimum size ? no, depends on line rate difference

64/66 sync gearbox, elastic buffer bypassed

improvement: go to 64/67
versal has interlaken hard IP


fFEX would need one CRC per LHC bunch tick (latency) --> need a larger bitrate offset !


firefly

more mezz
front panels
fp 100€ need jfex to design FP

bruno logic levels checked live + beep on desk