| Property | Value |
| Project Name: | d:\newjem\cpmtest |
| Target Device: | xcv1000e |
| Report Generated: | Wednesday 06/08/05 at 10:16 |
| Printable Summary (View as HTML) | top_summary.html |
| Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slice Flip Flops: | 12 | 24,576 | 1% | |
| Number of 4 input LUTs: | 1 | 24,576 | 1% | |
| Logic Distribution: | ||||
| Number of occupied Slices: | 10 | 12,288 | 1% | |
| Number of Slices containing only related logic: | 10 | 10 | 100% | |
| Number of Slices containing unrelated logic: | 0 | 10 | 0% | |
| Total Number of 4 input LUTs: | 1 | 24,576 | 1% | |
| Number of bonded IOBs: | 10 | 660 | 1% | |
| Number of GCLKs: | 2 | 4 | 50% | |
| Number of GCLKIOBs: | 2 | 4 | 50% | |
| Number of DLLs: | 4 | 8 | 50% |
| Property | Value |
| Final Timing Score: | 0 |
| Number of Unrouted Signals: | All signals are completely routed. |
| Number of Failing Constraints: | 0 |
| Constraint(s) | Requested | Actual | Logic Levels |
| All Constraints Met |
| Report Name | Status | Last Date Modified |
| Synthesis Report | Current | Wednesday 06/08/05 at 10:15 |
| Translation Report | Current | Wednesday 06/08/05 at 10:15 |
| Map Report | Current | Wednesday 06/08/05 at 10:15 |
| Pad Report | Current | Wednesday 06/08/05 at 10:15 |
| Place and Route Report | Current | Wednesday 06/08/05 at 10:15 |
| Post Place and Route Static Timing Report | Current | Wednesday 06/08/05 at 10:16 |
| Bitgen Report | Current | Wednesday 06/08/05 at 10:16 |